ASIC Physical Design Engineer
Generate a McCoy IQ challenge in 30 seconds.
See how candidates think and approach the work this role demands, before the phone screen. We'll build a video challenge from this posting, and you can edit or share it before it goes live.
Key details
Job Description
Become part of our team as an ASIC Physical Design Engineer, contributing to the RTL-to-GDSII implementation for advanced semiconductor nodes. Optimize floor planning, timing, and collaborate across teams to deliver high-performance networking chips. Ideal for candidates with hands-on ASIC design experience and expertise in hierarchical floorplanning and advanced node design.
Audit details(provenance, verification trail, raw fields)
Core fields
cisco:CISCISGLOBAL2015743EXTERNALENGLOBALProvenance
careers.cisco.com|/global/en/search-resultsVerification trail
This posting hasn't been probed by our closure verifier yet. Stream C runs on a rolling schedule against postings approaching the close-decision threshold.
LLM enrichment
See how we measure for definitions, or our corrections log for known issues. Found something wrong? Flag a correction.